1. Field of the Invention
The present inventions relates generally to communications with I/O devices in computer systems, and more particularly to message management in computer systems.
2. Description of Related Art
Various mailbox mechanisms have been implemented to transfer information from one entity to another entity in a computer system. For example, in computer system 100 (FIG. 1A), virtual processors 125 (including app 121 and operating system 122) and 135 (including app 131 and operating system 132) are not active on processor 114. Virtual processor 115 is executing on processor 114.
Hypervisor 113 is a software layer between an operating system 125 and physical processor 114. Hypervisor 113 is responsible for maintaining information so that when either virtual processor 125, or virtual processor 135 again has access to processor 114, the state of the virtual processor is restored so that processing can continue from the point where the processing was last stopped.
Typically, a mechanism was provided for communicating between virtual processors. For example, operating system 102 may write a message in mailbox 106 and send a command to hypervisor 103 that is operating on processor 104 to send the message to virtual processor 135.
Hypervisor 103 writes the message to a common memory area 150 (FIG. 1B) and interrupts hypervisor 113. It is not particularly important whether processor 104 and processor 114 are included on the same chip, on chips in a common physical location, or in different physical locations so long as there is a communication line between processors 104 and 114.
Hypervisor 113 (FIG. 1C) that is currently executing virtual processor 115 (including app 111 and operating system 112) steals cycles on processor 114 and reads the message from common memory area 150 in response to the interrupt. Hypervisor 113 determines that the message is for virtual processor 135. Accordingly, hypervisor 113 writes the message to queue 136.
When virtual processor 135 again becomes active, non-empty queue 136 causes an interrupt to be generated. Accordingly, virtual processor 135 processes the message in queue 136. While this method of communication has several advantages, the processor cycles required by hypervisor 113 to process a message for a virtual processor 135 that is not executing diminishes the performance of executing virtual processor 115.